Using Virtual Pins
compilation - Why is my design compiled by Quartus II successfully but no logic utilization? - Stack Overflow
Appendix B: Quartus Prime Tutorial
Pin Assignment Solution for Quartus II - YouTube
Quartus II Introduction Using Verilog Design
Quartus® ガイド - よく使用するピン・オプションの設定方法
Quartus II Introduction Using Schematic Design
Quick Quartus with Verilog
Quartus如何设置虚拟管脚Virtual Pin（具体设置方法）_Aubrey_.的博客-CSDN博客_quartus设置引脚
Technology, Management, Business, etc.: Declaring Virtual Pins in Quartus
Technology, Management, Business, etc.: Declaring Virtual Pins in Quartus
A look into CPLDs – using the Quartus II software and ModelSim « insideGadgets
集積効率のよい結果を引き出すには？：FPGA開発テクニック、チューニングの心得（2）（2/2 ページ） - MONOist
Hardware and Software Laboratory Project 3A (Hardware Part)
Quartus II and DE2 Manual
fpga4fun.com - Altera Quartus II quick-start guide
仮想ピンの使用
compile/verify
compile/verify
Xilinx vs Intel (Altera) FPGA performance comparison
Quartus® ガイド - よく使用するピン・オプションの設定方法
GSRD v14.0 - Compile Hardware Design - Arrow SoCKit Edition | Documentation | RocketBoards.org
Step by Step Guide to Making a 3 Bit Counter in Quartus
3.3.7.1. Pin Planner
Intel® Quartus® Prime Standard Edition Handbook Volume 2 Design Implementation and Optimization
Introduction to Quartus II Software
